The zynthian dac adac light hats arrived for testing.
I am sending 2 to @le51 and 2 to @riban to help me in codec development.
I will keep 2 so there are 4 left. Message me to get them for free if you can help us in code development.
If we get them working next step would be to get working 4 in parallel using 4 pairs of i2s data lines that rpi 5 support.
@stojos Please post details of the project here, e.g. PCB schematics, pinout, etc.
Schematics:
Here is some of the details:
It looks like existing hifiberry-dac codec is set to be master (produce its own clock) hence it recognise the hardware but there is a lot of clicking. Hence we need to either try to create a separate overlay and try to overlay that parameter if exist in code or develop our own codec in addition to overlay. Probably we will need to code codec for PCM1808.
Previously, there was success in getting this hardware working.
Here is the link
This was before linux kernel moved to overlays for loading drivers.
hifibery-dac overlay and codec is available on (linux github)[RaspberryMatic/linux-4.1/arch/arm/boot/dts/overlays/hifiberry-dac-overlay.dts at master · eq-3/RaspberryMatic · GitHub]
Here is an example of simple i2s slave overlay that is using spdif codec GitHub - AkiyukiOkayasu/RaspberryPi_I2S_Slave: General I2S slave I/O device tree overlay for Raspberry Pi.
I have tried to use this simple codec but alsa did not recognise it. I could not figure out is overlay loaded. My sd card get corrupted with installation of vcdbg. You can set overlay to debug mode adding dtdebug=1 to /boot/firmware/config.txt file.
Sorry that I did not progress further. Last night, after installing vcdbg my sd card get corrupted.
The 5102 can create its own internal system clock if SCK is held low. If I bridge pins 11 & 12 on U1 then the audio output cleans up. For some reason this does not happen if I ground I2S_MASTER_CLOCK via the RPi GND header pin. This has the 22R RN1 resistor in series which seems enough to stop this mode working. So it seems that with HifiBerry DAC+ Light selected, there is not a suitable clock on pin 7 which I validated with an osciloscope. We can either tie the SCK to GND or find a config that puts out the required clock.
[Edit] Sorry - I now read the description above. I disconnected SCK from pin 7 and measured it. There is a sine wave at 20MHz beating (with quite a ring) at 431kHz. This does not look like the clean24.576MHz clock we expect from the ADC.
Clock should be produced by crystal on the board and not by SoC (rpi).
Yes pcm5102 could produce its own clock when it receives BCK clock by grounding pcm5102 sck pin but pcm1808 can’t do that. We must have external clock working.
Have you tried to check with osculoscope that there is 24MHz clock on pin 7 on card when rpi is not connected but hat connected to 3.3v power, 5v power and ground. Also LRCK pin 35 and BCK clock pin 12 should be there because it is produced by pcm1808.
Bugger, maybe we need caps on crystal. Let me check data sheet .
Crystal is lcsc part number C2831388.
Data sheet says that
We could try to somehow to get caps installed. Here is where are the crystals (X2) pin 3 and pin 4 on the PCB .
I did not think that they would make such a difference in stability of the clock.
Another option is to have rpi to create clock. We could half the clock speed and set pcm1808 accordingly with solder jumpers.
I am not gong to be able to spend much (any?) time on this for a few days. I appreciate that some of the following is aleady described or understood but I want to make a note so that my understanding is documented and may be validated by others…
I did briefly see what looked like a proper clock signal on pin 7 but that was for about 1s at power-up and was not repeatable so it does look like the crystal is not producing the clean clock or is being interferred with by other circuitry. I tried measuring with the scope whilst the board had power but no other connection to RPi.
I think this may be beneficial. If the RPi can generate SCK then we can use the hardware synchronisation in PCM5102 & PCM1808 which may reduce load on RPi . (I haven’t looked at the datasheets for a while but I would hope that SCK is generated by dedicated hardware and not system clock processing.)
I can’t see any solder bridges on the configuration pads but can measure shorts on all of them so, are the default configs done with PCB tracks? If so, where are they if they need to be cut?
[Edit] Reviewing the RP1 documentation and kernel I2S driver source code I suspect that pin 12 is actually used for SCK (not BCK as I had assumed). The kernel driver allows x32, x48 & x64 multipliers so at 48000fps we have options for 1.536MHz, 2.304MHz or 3.072MHz (although there may be another multiplier somewhere I have yet to find - there is talk of a static x8 which would give us 12.288MHz, 18.432MHz & 24.576MHz). [Edit] I think the kernel multipliers may relate to quantity of bits in each sample, e.g. x32 would be 16-bit stereo. We would be aiming to use 32-bit stereo.
I measured the clock on pin 12 with Hifiberry DAC+ Lite configured and it is 3.05MHz which, as I origonally expected, is the bit clock rate of 32-bit stereo at 48000 frames per second.
Reviewing the RP1 docs I see that it exposes common SCLK (BCK???) and WS (LRCLK) and then individual DIN & DOUT for each of the 4 I2S ports. Depending on GPIO configuration, it uses either the slave or master instance, so all ports are either slave or master. Changing GPI config impacts all GPI so it may change behaviour of other pins that we need to consider.
The RP1 actually has 3 I2S devices:
It only exposes either I2S0 or I2S1 and does not expose I2S2.
Hi @stojos !
Powering everything directly from the Pi’s power pins would certainly add some noise.
DAC & ADC chips have separated power pins for analog and digital parts and it’s not without a good reason. I strongly recommend to add dedicated LDOs to power the analog pins on DAC and ADC chips. I mean a good LDO for powering each chip. Good LDOs are not expensive and they will isolate analog parts from power noise. I learned this from the excellent HifiBerry designs 
All the best,
@riban, all your bullet points are correct. It is my understanding as well.
I am not sure that this is correct. Pin 12 is used to generate BCK for pcm5102a - it is not a master clock. If you look at hifiberry dac+light pcb you will see that pin 12 is connected to pcm5102 BCK and pcm5102’s SCK pin is connected to ground to force internal clock to be used. Many DACs and ADACs can generate master clock internally based on BCK but pcm1808 ADAC can’t do that. Hence why I put oscillator on the board.
We can easily set pcm1808 as slave using solder jumber MD0 on the back of the board by cutting current copper linked to 3.3V and soldering it to another side to ground.
In this case pcm1808 will listen for BCL LRCK and not produce it itself (not be a master).
It looks like we can change the function of each header pin individually but must do all the I2S together (because the way the I2S devices are controlled). So we could configure the RPi to be clock producer or clock consumer.
Pin 12 is indeed used as BCK output to I2S devices such as the PCM5102 but I wonder whether it can be configured with a higher multiplier to turn it into a SCK. (The docs talk about it being SCLK.) If so, we could use it to driver the PCM1808 which could act as master to create BCK for the PCM5102. (I think it needs BCK.) I am investigating but do not have access to the device today to do any testing.
@jofemodo - yes you are correct that it is better to do that when there is an option but when you don’t have option for external power it works too. Hifiberry DAC+ ADAC PRO is powered by rpi and I don’t have any problems using it on zynthian.
If we can get the SCK working on the board and we can configure RPi as clock consumer then we may not need to change the design (much).
X2 would create the 24.576MHz SCK and feed it to U1 & U2. U2 would create LRCK and BCK and feed it to U1 and RPi.
We would not want RPi pin 7 connected.
U2 (PCM1808) would act as clock producer and do ADC delivering stereo audio to RPi via I2S DIN.
U1 (PCM5102) would act as clock consumer and do DAC accepting DOUT from RPi.
RPi would act as clock consumer (assuming it works without SCK but with BCK only which the docs suggest it can, effectively having a x1 multiplier of BCK to SCK).
We need an overlay that configures RPi to use GPI config a4 for GPI18,19,20,21 (and 22,23,24,25,26,27 when we go for multichannel). It would need to configure I2S as clock consumer and set the other params, e.g. multplier, word length, etc.
If no one else has, I will give this a go over the weekend.
That is all correct. Most important is master clock, why it is not 24.576MHz.
I am not sure that we can get rid off the feed of master clock to rpi on pin7. As I understand every participant in i2s (dac, adac, and SoC) must have master clock. Some can produce it internally based on BCK, but I am not sure if rpi can do that. I don’t have original hifiberry dac light but looking at photo on hifiberry site it comes with oscillator. If somebody has it they can check that this is indeed oscillator and if it feeds to pin 7 of rpi.
In the current config of this card we should be able to test pcm1808 and pcm5102 without raspberry being connected because there is already i2s clock source, master and slave. So if we simple connect in and out pins, supply board with power and feed audio into pcm1808 we should get audio out from pcm5102.
We need to get this working first to make sure that hardware is correct before pluging to rpi for overlay and codec development.
But you have an option. You don’t need external power. You take the 5V from the RPi pins and then power 3V LDOs to power the DAC and ADC chips. Ultra low ripple LDOs filter power noise a lot better than a simple capacitor. That’s the simple trick to get ultra clean, almost isolated, 3V voltage to power the DAC/ADC analog circuits.
The best!
BTW, hifiberry’s high-end boards have dedicated LDOs for each DAC / ADC chip. I copied from them
pcm1808 require 5V power for its analog operations and 3.3V for its digital operations.
I’ve seen ncp163 has a very very low drop out voltage: 80 mV
so if using a 5.15V power supply for the Pi, it should be doable to obtain a very clean 5V power.
This is how Hifiberry DAC x8 (with 4 pcm5102a) works (with the Pi being the master):
No, that is not correct. I2S describes three signals:
Master clock or system clock or SCK is something that some ADC or DAC require to drive their converters and filters. It may differ beteen devices or may not be required if the device can create a suitable clock, e.g. via PLL tuned by the BCK.
RP1 documentation does not mention another clock and does not assign any GPI to it so it can’t be used. The docs do refer to SCLK and not BCK and reading the source code I suspect that the RP1 uses this single clock to act as both, expecting SCLK to run at bit rate, e.g. 3.072MHz.
